Recently, in a semiconductor integrated circuit, the components of the circuit have been extremely miniaturized and densely integrated. And now it appears to be almost impossible to achieve further miniaturization of the components. Thus, to improve the performance and the reliability of highly integrated circuits, it becomes necessary to take measures other than further miniaturization of the components. In order to cope with this situation, technologies of forming grooves on the surface of a semiconductor substrate, and laminating a semiconductor layer, an insulating layer, a metal layer, etc., in a three-dimensional structure have been developed.
For example, in a MOS capacitor which is a component of a dynamic RAM (DRAM), a method has been studied which provides grooves on a surface of a silicon substrate and forms capacitors in the grooves in order to increase the capacity of the capacitors without increasing an area occupied by the capacitors. However, in order to increase the reliability to protect against the breakage of the capacitors due to their aging, it is required to make the potential of the upper electrode at 0 or 5 volt for the purpose of discriminating the contents of the memory. Therefore, it has been employed a method which forms on a surface of the silicon substrate an impurity diffusion layer having a density of 10.times.10.sup.18 cm.sup.-3 and a conductive type opposite to the substrate.
On the other hand, since multiple cells are arranged in a DRAM, there is the problem that a separation withstand voltage between the impurity diffusion layers of the capacitors formed in the grooves is lowered as the distance between the grooves is reduced in the formation of high density components.
For example, let us suppose that an n-type impurity diffusion layer is formed on a groove surface of a p-type substrate. In order to solve the above-mentioned problem, a method is employed which includes the steps of forming a p-type impurity diffusion layer slightly higher in density than the substrate underlying the impurity diffusion layer on the groove surface to provide a double diffusion layer or a so-called HIC structure. The HIC structure is known to have an excellent soft error preventing characteristic even when the capacity of the capacitors reduced.
However, it is very difficult to form a double diffusion layer on the surface of the grooves with high accuracy. For example, the ion implantation process which is a generally known doping technique cannot provide a uniform density of impurities into the bottom and side walls in the groove. To provide a uniform density of impurities into the bottom and side walls in the groove, a so-called doped glass, i.e., a silicon oxide film containing impurities may be used. However, for the impurities contained in the doped glass to diffuse out of the glass to form a diffusion layer, it is necessary to perform the steps of film (doped glass) formation, impurity diffusion and film separation for each kind of impurity to be diffused, thus increasing the number of steps greatly.
It appears that it is possible to reduce the number of the steps when a doped glass containing plural kinds of impurities is used. However, in the current level of techniques it is very difficult to control the diffusion of the plural kinds of impurities from the doped glass so as to obtain a desired profile of the diffused impurities. Therefore, this technique has not yet been put into practical use.
In fact, not only the impurity diffusion technique using doped glass containing plural kinds of impurities as mentioned above, but also techniques of diffusing impurities from a doped glass of any type have been regarded as being impractical because they cannot satisfactorily control the diffusion of impurities.
Therefore, it has been regarded as impossible to form a semiconductor device having a double diffusion layer on the groove surface. In fact, it has been practically impossible to form a double diffusion layer of a desired construction on the groove surface.
Further, not limited to the example of DRAM as described above, techniques of diffusing impurities from a silicon oxide film containing a plurality of kinds of impurities are regarded as impractical because of lacking controllability of impurity diffusion.
The technique of diffusing a single kind of impurity has the following problems. One problem lies in the control of the depth of the impurity diffusion layer. The depth of the impurity diffusion layer must be shallow to miniaturize the components of the device. However, it is very difficult to achieve a shallow implantation of impurities at a relatively high density.
For example, in a doped oxide method which diffuses boron, generally used as p-type impurities, into a silicon substrate using as the diffusion source a boron containing glass layer (BSG), the diffusion coefficient in the glass layer is smaller by one hundredth or more compared to the diffusion coefficient in the silicon substrate. Therefore, in many cases, the speed of such impurity diffusion is determined by that of impurities in the glass layer.
Therefore, if boron impurities of high density, for example of 10.sup.20 cm.sup.-3, are introduced into the silicon substrate, diffusion must be performed in an atmosphere of a relatively high temperature higher than 1000.degree. C., using a BSG film containing boron at a density higher than 10.sup.20 cm.sup.-3. In such diffusion, it is necessary to move slowly a wafer into or out of the diffusion furnace in order to suppress stresses in the wafer. During the slow movement of the wafer, the impurities are diffused substantially, and the area into which the impurities are introduced expands undesirably. Thus, it is very difficult to form a shallow impurity diffusion layer.
There is a method of thermally diffusing impurities in a short time. This method uses a lamp heating furnace and is able to provide a shallow impurity layer. However, there is a disadvantage that the quality of products vary and it is difficult to constantly obtain desired impurity layers. Therefore, the yield is lowered.